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precision, very low noise, low input bias current operational amplifiers ad8671/ad8672/ad8674 rev. d information furnished by analog devices is believed to be accurate and reliable. however, no responsibility is assumed by analog devices for its use, nor for any infringements of patents or other rights of third parties that may result from its use. specifications subject to change without notice. no license is granted by implication or otherwise under any patent or patent ri ghts of analog devices. trademarks and registered trademarks are the property of their respective owners. one technology way, p.o. box 9106, norwood, ma 02062-9106, u.s.a. tel: 781.329.4700 www.analog.com fax: 781.461.3113 ?2004C2009 analog devices, inc. all rights reserved. features very low noise: 2.8 nv/hz, 77 nv p-p wide bandwidth: 10 mhz low input bias current: 12 na max low offset voltage: 75 v max high open-loop gain: 120 db min low supply current: 3 ma typ per amplifier dual-supply operation: 5 v to 15 v unity-gain stable no phase reversal applications pll filters filters for gps instrumentation sensors and controls professional quality audio general description the ad8671/ad8672/ad8674 are very high precision amplifiers featuring very low noise, very low offset voltage and drift, low input bias current, 10 mhz bandwidth, and low power consumption. outputs are stable with capacitive loads of over 1000 pf. supply current is less than 3 ma per amplifier at 30 v. the ad8671/ad8672/ad8674s combination of ultralow noise, high precision, speed, and stability is unmatched. the msop version of the ad8671/ad8672 requires only half the board space of comparable amplifiers. applications for these amplifiers include high quality pll filters, precision filters, medical and analytical instrumentation, precision power supply controls, ate, data acquisition, and precision controls as well as professional quality audio. the ad8671/ad8672 are specified over the extended industrial temperature range (?40c to +125c), and the ad8674 is specified over the industrial temperature range (?40c to +85c). the ad8671/ad8672 are available in the 8-lead soic and 8-lead msop packages. the ad8674 is available in 14-lead soic and 14-lead tssop packages. surface-mount devices in msop packages are available in tape and reel only. pin configurations nc = no connect nc 1 ? in 2 + in 3 v? 4 nc v+ out nc 8 7 6 5 03718-b-001 ad8671 top view (not to scale) nc = no connect nc 1 ? in 2 + in 3 v? 4 nc v+ out nc 8 7 6 5 03718-b-002 ad8671 top view (not to scale) figure 1. 8-lead soic_n (r-8) figure 2. 8-lead msop (rm-8) out a 1 ?in a 2 +in a 3 v? 4 v+ out b ?in b +in b 8 7 6 5 03718-b-003 ad8672 top view (not to scale) out a 1 ?in a 2 +in a 3 v? 4 v+ out b ?in b +in b 8 7 6 5 03718-b-004 ad8672 top view (not to scale) figure 3. 8-lead soic-n (r-8) figure 4. 8-lead msop (rm-8) out a 1 ?in a 2 +in a 3 v+ 4 +in b 5 ?in b 6 out b 7 out d ?in d +in d v? 14 13 12 11 +in c ?in c out c 10 9 8 03718-b-005 ad8674 top view (not to scale) out a 1 ?in a 2 +in a 3 v+ 4 +in b 5 ?in b 6 out b 7 out d ?in d +in d v? 14 13 12 11 +in c ?in c out c 10 9 8 03718-b-006 ad8674 top view (not to scale) figure 5. 14-lead soic_n (r-14) figure 6. 14-lead tssop (ru-14)
ad8671/ad8672/ad8674 rev. d | page 2 of 2 0 table of contents specifications ..................................................................................... 3 ? electrical characteristics, 5.0 v ............................................... 3 ? electrical characteristics, 15 v ................................................ 4 ? absolute maximum ratings ............................................................ 5 ? esd caution .................................................................................. 5 ? typical performance characteristics ............................................. 6 ? applications ..................................................................................... 11 ? power dissipation calculations ................................................ 11 ? unity-gain follower applications ........................................... 11 ? output phase reversal ............................................................... 12 ? total noise vs. source resistance ............................................. 12 ? total harmonic distortion (thd) and noise ....................... 13 ? driving capacitive loads .......................................................... 13 ? gps receiver ............................................................................... 14 ? band-pass filter .......................................................................... 14 ? pll synthesizers and loop filters ........................................... 14 ? outline dimensions ....................................................................... 15 ? ordering guide .......................................................................... 17 ? revision history 12/09rev. c to rev. d changes to features and general description sections .......... 1 changes to absolute maximum ratings section, table 3, and table 4 ................................................................................ 5 added power dissipation calculations section ..................... 11 updated outline dimensions ................................................... 15 changes to ordering guide ...................................................... 17 6/05rev. b to rev. c changes to figure 6 ...................................................................... 1 updated outline dimensions ................................................... 14 changes to ordering guide ...................................................... 16 4/04rev. a to rev. b changes to figure 32 .................................................................. 11 changes to figures 36, 37, and 38 ............................................ 12 1/04rev. 0 to rev. a added ad8672 and ad8674 parts .............................. universal changes to specifications ............................................................. 3 deleted figure 3 ............................................................................. 6 changes to figures 7, 8, and 9 ..................................................... 6 changes to figure 37 .................................................................. 12 added new figure 32 ................................................................. 10
ad8671/ad8672/ad8674 rev. d | page 3 of 20 specifications electrical characteristics, 5.0 v v s = 5.0 v, v cm = 0 v, t a = 25c, unless otherwise noted. table 1. parameter symbol conditions min typ max unit input characteristics offset voltage v os 20 75 v C40c < t a < +125c 30 125 v offset voltage drift ?v os /?t C40c < t a < +125c ad8671 0.3 0.5 v/c ad8672/ad8674 0.3 0.8 v/c input bias current i b C12 +3 +12 na +25c < t a < +125c C20 +5 +20 na C40c < t a < +125c C40 +8 +40 na input offset current i os C12 +6 +12 na +25c < t a < +125c C20 +6 +20 na C40c < t a < +125c C40 +8 +40 na input voltage range C2.5 +2.5 v common-mode rejection ratio cmrr v cm = C2.5 v to +2.5 v 100 120 db large signal voltage gain a vo r l = 2 k, v o = C3 v to +3 v 1000 6000 v/mv input capacitance, common mode c incm 6.25 pf input capacitance, differential mode c indm 7.5 pf input resistance, common mode r in 3.5 g input resistance, differential mode r indm 15 m output characteristics output voltage high v oh r l = 2 k, C40c to +125c +3.8 +4.0 v output voltage low v ol r l = 2 k, C40c to +125c C3.9 C3.8 v output voltage high v oh r l = 600 +3.7 +3.9 v output voltage low v ol r l = 600 C3.8 C3.7 v output current i out 10 ma power supply power supply rejection ratio psrr v s = 4 v to 18 v ad8671/ad8672 110 130 db ad8674 106 115 db supply current/amplifier i sy v o = 0 v 3 3.5 ma C40c < t a < +125c 4.2 ma dynamic performance slew rate sr r l = 2 k 4 v/s settling time t s to 0.1% (4 v step, g = 1) 1.4 s to 0.01% (4 v step, g = 1) 5.1 s gain bandwidth product gbp 10 mhz noise performance peak-to-peak noise e n p-p 0.1 hz to 10 hz 77 100 nv p-p voltage noise density e n f = 1 khz 2.8 3.8 nv/hz current noise density i n f = 1 khz 0.3 pa/hz channel separation ad8672/ad8674 c s f = 1 khz C130 db f = 10 khz C105 db
ad8671/ad8672/ad8674 rev. d | page 4 of 20 electrical characteristics, 15 v v s = 15 v, v cm = 0 v, t a = 25c, unless otherwise noted. table 2. parameter symbol conditions min typ max unit input characteristics offset voltage v os 20 75 v C40c < t a < +125c 30 125 v offset voltage drift ?v os /?t C40c < t a < +125c ad8671 0.3 0.5 v/c ad8672/ad8674 0.3 0.8 v/c input bias current i b C12 +3 +12 na +25c < t a < +125c C20 +5 +20 na C40c < t a < +125c C40 +8 +40 na input offset current i os C12 +6 +12 na +25c < t a < +125c C20 +6 +20 na C40c < t a < +125c C40 +8 +40 na input voltage range C12 +12 v common-mode rejection ratio cmrr v cm = C12 v to +12 v 100 120 db large signal voltage gain a vo r l = 2 k, v o = C10 v to +10 v 1000 6000 v/mv input capacitance, common mode c incm 6.25 pf input capacitance, differential mode c indm 7.5 pf input resistance, common mode r in 3.5 g input resistance, differential mode r indm 15 m output characteristics output voltage high v oh r l = 2 k, C40c to +125c +13.2 +13.8 v output voltage low v ol r l = 2 k, C40c to +125c C13.8 C13.2 v output voltage high v oh r l = 600 +11 +12.3 v output voltage low v ol r l = 600 C12.4 C11 v output current i out 20 ma short circuit current i sc 30 ma power supply power supply rejection ratio psrr v s = 4 v to 18 v ad8671/ad8672 110 130 db ad8674 106 115 db supply current/amplifier i sy v o = 0 v 3 3.5 ma C40c ad8671/ad8672/ad8674 rev. d | page 5 of 20 absolute maximum ratings table 3. 1 parameter rating supply voltage 36 v input voltage v s C to v s + differential input voltage 0.7 v output short-circuit du ration indefinite storage temperature range all packages C65c to +150c operating temperature range 8-lead packages C40c to +125c 14-lead packages C40c to +85c junction temperature range all packages C65c to +150c lead temperature range (soldering, 60 sec) 300c stresses above those listed under absolute maximum ratings may cause permanent damage to the device. this is a stress rating only; functional operation of the device at these or any other conditions above those indicated in the operational section of this specification is not implied. exposure to absolute maximum rating conditions for extended periods may affect device reliability. see the applications section for a related discussion on power. table 4. package characteristics package type ja 1 jc unit 8-lead msop (rm) 142 44 c/w 8-lead soic_n (r) 120 43 c/w 14-lead soic_n (r) 90 36 c/w 14-lead tssop (ru) 112 35 c/w 1 absolute maximum ratings apply at 25c, unless otherwise noted. 1 ja is specified for the worst-case conditions, that is., ja is specified for the device soldered on a 4-layer circuit board for surface-mount packages. esd caution esd (electrostatic discharge) sensiti ve device. electrostatic charges as hi gh as 4000 v readily accumulate on the human body and test equipment and can discharge without detection. although this product features proprietary esd protection circuitry, permanent damage may occur on devices subjected to high energy electrostatic discharges. therefore, proper esd precautions are recommended to avoid performance degradation or loss of functionality.
ad8671/ad8672/ad8674 rev. d | page 6 of 20 typical performance characteristics 03718-b-007 frequency (hz) voltage noise density (nv/ hz) 4 8 12 16 20 24 28 32 0 0 102030405060708090100 v s = 15v figure 7. voltage noise density vs. frequency 03718-b-008 frequency (khz) voltage noise density (nv/ hz) 0 4.5 9.0 13.5 18.0 22.5 27.0 31.5 0 0.1 0.2 0.3 0.4 0.5 0.6 0.7 0.8 0.9 1.0 v s = 15v figure 8. voltage noise density vs. frequency 03718-b-009 frequency (khz) voltage noise density (nv/ hz) 0 11 0 23456789 0 2.5 5.0 7.5 10.0 12.5 15.0 17.5 v s = 15v figure 9. voltage noise density vs. frequency 0 5 10 15 20 25 30 35 40 45 ?35 v os ( v) number of amplifiers ?25 ?5 ?15 0 45 ?30 ?20 ?10 5 10 15 20 25 30 35 40 03718-b-010 v s = 5v t a = 25c figure 10. input offset voltage distribution 0 5 10 15 20 25 30 35 ?35 v os ( v) number of amplifiers ?25 ?5?15 0 50 ?30 ?20 ?10 5 10 15 20 25 30 35 40 03718-b-011 45 v s = 15v t a = 25c figure 11. input offset voltage distribution 6 7 8 9 10 11 12 13 14 15 16 v os ( v) temperature (c) ?40 85 25 125 03718-b-012 v s = 15v v s = 5v figure 12. input offset voltage vs. temperature
ad8671/ad8672/ad8674 rev. d | page 7 of 20 0 0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5 5.0 i b (na) temperature (c) ?40 85 25 125 +i b ?i b 03718-b-013 v s =5v figure 13. input bias current vs. temperature ?1.0 ?0.5 0 0.5 1.0 1.5 2.0 2.5 i b (na) temperature (c) ?40 85 25 125 +i b ?i b 03718-b-014 v s = 15v figure 14. input bias current vs. temperature 2.4 2.6 2.8 3.0 3.2 3.4 i sy (ma) 3.6 3.8 4.0 temperature (c) ?40 85 25 125 v s = 15v v s =5v 03718-b-015 figure 15. supply current vs. temperature 10.0 10.5 11.0 11.5 12.0 12.5 13.0 13.5 14.0 14.5 output voltage (v) temperature (c) ?40 85 25 125 r l = 600 r l = 2k 03718-b-016 v s = 15v figure 16. output voltage high vs. temperature ?14.5 ?14.0 ?13.5 ?13.0 ?12.5 ?12.0 ?11.5 ?11.0 output voltage (v) temperature (c) ?40 85 25 125 r l = 600 r l = 2k 03718-b-017 v s = 15v figure 17. output voltage low vs. temperature frequency (hz) open-loop gain (db) ?10 0 10 100k 03718-b-018 10m 1m ?40 ?30 ?20 20 30 40 50 v sy = 15v r l = 10k c l = 20pf m = 59 gain phase open-loop phase (db) ?45 45 ?180 ?135 ?90 90 135 180 225 0 60 270 figure 18. open-loop gain and phase shift vs. frequency
ad8671/ad8672/ad8674 rev. d | page 8 of 20 0 5000 10000 15000 20000 25000 30000 a vo (v/mv) temperature (c) ?40 85 25 125 5v 15v 03718-b-019 figure 19. open-loop gain vs. temperature frequency (hz) 1k 1m closed-loop gain (db) ?10 0 10 20 40 50 100k 10k 10m 03718-b-020 30 ?20 ?30 ?40 ?50 100m a v = 100 a v = 10 a v = 1 v sy = 15v v in = 10mv r l = c l = 20pf figure 20. closed-loop gain vs. frequency frequency (hz) 1k 10m impedance ( ) 40 50 60 70 90 100 100k 10k 100m 03718-b-021 80 30 20 10 0 a vo = 100 100 a vo = 10 a vo = 1 1m figure 21. output impedance vs. frequency v sy = 15v v in = 4v r l = 2k 03718-b-022 voltage (1v/div) time (100 s/div) figure 22. large signal transient response v sy = 15v v in = 200mv p-p r l = 2k 03718-b-023 voltage (50mv/div) time (10 s/div) figure 23. small signal transient response capacitance (pf) 1k small signal overshoot (%) +os 0 10 20 30 40 50 60 100 10k ?os 03718-b-024 v s =15 figure 24. small signal overshoot vs. load capacitance
ad8671/ad8672/ad8674 rev. d | page 9 of 20 v in v out 0v v s = 15v v in = 200mv p-p a v = ?100 r l = 10k 0v 03718-b-025 voltage (200mv/div) time (4 s/div) figure 25. positive overdrive recovery v in v out v sy = 15v v in = 200mv p-p a v = ?100 r l = 10k 0v 0v 03718-b-026 voltage (200mv/div) time (4 s/div) figure 26. negative overdrive recovery frequency (hz) 1k 1m cmrr (db) 40 60 80 100 140 160 100k 10k 10m 03718-b-027 120 20 0 ?20 ?40 100m v sy = 15v 100 10 figure 27. cmrr vs. frequency frequency (hz) 1k 1m psrr (db) 40 60 80 100 140 160 100k 10k 10m 03718-b-028 120 20 0 ?20 ?40 v sy = 15v 100 ?psrr +psrr 10 figure 28. psrr vs. frequency 127 128 129 130 131 132 psrr (db) 133 134 135 temperature (c) ?40 85 25 125 03718-b-029 v s = 2.5v to 18v figure 29. psrr vs. temperature 03718-b-030 v s = 15v time (1 s/div) voltage noise (50nv/div) figure 30. 0.1 hz to 10 hz input voltage noise
ad8671/ad8672/ad8674 rev. d | page 10 of 20 frequency (hz) channel separation (db) 100 ?120 ?40 ?20 0 1k 10k 100k 1m ?60 ?140 ?80 ?100 10m 100m 03718-b-031 v s = 15v, 5v figure 31. channel separation
ad8671/ad8672/ad8674 rev. d | page 11 of 20 applications power dissipation calculations to achieve low voltage noise in a bipolar op amp, the current must be increased. the emitter-base theoretical voltage noise is approximately hznv/ 2 10 9 c n qi kte = to achieve the low voltage noise of 2.8 nv/hz, the input stage current is higher than most op amps with an equivalent gain bandwidth product. the thermal noise of a 1 k resistor is 4 nv/hz, which is higher than the voltage noise of ad8671 family. low voltage noise requires using low values of resistors, so low voltage noise op amps should have good drive capability, such as a 600 load. this means that the second stage and output stage are also biased at higher currents. as a result, the supply current of a single op amp is 3.5 ma maximum at room temperature. junction temperature has a direct affect on reliability. for more information, visit the following analog devices, inc., website: http://www.analog.com/en/corporate/quality-and- reliability/reliability-data/content/index.html . mttf and fit calculations can be done based on the junction temperature and ic process. use the following equation to determine the junction temperature: t j = t a + p d ja for the ad8671 single in the 8-lead msop package, the thermal resistance, ja , is 142c/w. if the ambient temperature is 30c and the supply voltages are 12 v, the power dissipation is 24 v 3.5 ma = 84 mw therefore, the rise above ambient temperature is 84 mw 142c/w = 12c if the ambient temperature is 30c, the junction temperature is 42c. the previously mentioned website that details the effect of the junction temperature on reliability has a calculator that requires only the part number and the junction temperature to determine the process technology. for the ad8674 single in the 14-lead tssop package, the thermal resistance, ja , is 112c/w. although ja is lower than it is for the 8-lead package, the four op amps are powered simultaneously. if the ambient temperature is 50c and the supply voltages are 15 v, the power dissipation is 30 v 4.2 ma four op amps = 504 mw therefore, the rise above ambient temperature is 504 mw 112c/w = 56c with an ambient temperature of 50c, the junction temperature is 106c. this is less than the specified absolute maximum junction temperature, but for systems with long product lifetimes (years), this should be considered carefully. note that these calculations do not include the additional dissipation caused by the load current on each op amp. possible solutions to reduce junction temperature include system level considerations such as fans, peltier thermoelectric coolers, and heat pipes. board considerations include operation on lower voltages, such as 12 v or 5 v, and using two dual op amps instead of one quad op amp. if the extremely low voltage noise and high gain bandwidth is not required, using other quad op amps, such as ada4091-4 , op4177 , ada4004-4 , op497 , or ad704 can be considered. unity-gain follower applications when large transient pulses (>1 v) are applied at the positive terminal of amplifiers (such as the op27, lt1007, opa227, and ad8671) with back-to-back diodes at the input stage, the use of a resistor in the feedback loop is recommended to avoid having the amplifier load the signal generator. the feedback resistor, r f , should be at least 500 . however, if large values must be used for r f , a small capacitor, c f , should be inserted in parallel with r f to compensate for the pole introduced by the input capacitance and r f . figure 32 shows the uncompensated output response with a 10 k resistor in the feedback and the compensated response with c f = 15 pf. 03718-b-032 ref1 +over 23.23% ch2 +over 7.885% voltage (1v/div) output uncompensated output compensated time (100ns/div) figure 32. transient output response
ad8671/ad8672/ad8674 rev. d | page 12 of 20 output phase reversal phase reversal is a change of polarity in the amplifier transfer function that occurs when the input voltage exceeds the supply voltage. the ad8671/ad8672/ad8674 do not exhibit phase reversal even when the input voltage is 1 v beyond the supplies. v sy = 15v v in v out 03718-b-033 time (10 s/div) voltage (1v/div) figure 33. output phase reversal total noise vs. source resistance the low input voltage noise of the ad8671/ad8672/ad8674 makes them a great choice for applications with low source resistance. however, because they have low input current noise, they can also be used in circ uits with substantial source resistance. figure 34 shows the voltage noise, current noise, thermal noise, and total rms noise of the ad8671 as a function of the source resistance. for r s < 475 , the input voltage noise, e n , dominates. for 475 < r s < 412 k, thermal noise dominates. for r s > 412 k, the input current noise dominates. 10 1k total noise (nv/ hz) 1 10 100 1000 100 10k 03718-b-034 100k 1m e n_t c a b e n i n (4kr s t) 1/2 source resistance ( ) figure 34. noise vs. source resistance
ad8671/ad8672/ad8674 rev. d | page 13 of 20 03718-b-036 v sy = 15v r l = 2k c l = 1nf v in = 100mv a v = +1 ch2 +over 39.80% ch2 ?over 39.80% time (10 s/div) voltage (500mv/div) total harmonic distortion (thd) and noise the ad8671/ad8672/ad8674 exhibit low total harmonic distortion (thd) over the entire audio frequency range. this makes them suitable for applications with high closed-loop gains, including audio applications. figure 35 shows approximately 0.0006% of thd + n in a positive unity gain, the worst-case configuration for distortion. hz 100 1k 10k percentage lt1007 0.0001 0.0002 0.0005 0.0010 0.0020 0.0050 0.0100 0.0200 0.0500 0.1000 50 20 500 200 5k 2k ad8671 20k 03718-b-035 v s = 5v v in = 2.5v r l = 600 figure 36. ad8671 capacitive load drive 500 r f v cc 220pf c f v in v ee r g 500 10 r s 1nf c l 03718-b-037 2k r l figure 35. total harmonic distortion and noise figure 37. recommended capacitive load circuit driving capacitive loads the ad8671/ad8672/ad8674 can drive large capacitive loads without causing instability. however, when configured in unity gain, driving very large loads can cause unwanted ringing or instability. 03718-b-038 v sy = 15v r l = 2k c l = 1nf c f = 220pf v in = 100mv a v = +2 ch2 +over 5.051% ch2 ?over 6.061% time (10 s/div) voltage (100mv/div) figure 36 shows the output of the ad8671 with a capacitive load of 1 nf. if heavier loads are used in low closed-loop gain or unity-gain configurations, it is recommended to use external compensation as shown in the circuit in figure 37 . this technique reduces the overshoot and prevents the op amp from oscillation. the trade-off of this circuit is a reduction in output swing. however, a great added benefit stems from the fact that the input signal and the op amps noise are filtered, and thus the overall output noise is kept to a minimum. figure 38. compensated load drive the output response of the circuit is shown in figure 38 .
ad8671/ad8672/ad8674 rev. d | page 14 of 20 ad8671 band-pass filter low noise op amp mixer demodulator low-pass filter vga adc ad10200 ad831 ad8671 ad630 ad8610 ad8369 code generator 03718-b-039 figure 39. simplified block diagram of a gps receiver gps receiver gps receivers require low noise to minimize rf effects. the precision of the ad8671 makes it an excellent choice for such applications. its very low noise and wide bandwidth make it suitable for band-pass and low-pass filters without the penalty of high power consumption. figure 39 shows a simplified block diagram of a gps receiver. the next section details the design equations. band-pass filter filters are useful in many applications; for example, band-pass filters are used in gps systems, as discussed in the previous section. figure 40 shows a second-order band-pass krc filter. 18k 10k 2.25k r3 r b r a v cc v ee 2.25k r2 2.25k r1 1nf c2 v in 1nf c2 03718-b-040 figure 40. band-pass krc filter the equal component topology yields a center frequency rc fo = 2 2 and k ? = 4 2 wh er e: a b r r k += 1 the band-pass response is shown in figure 41 . hz 100k 1k 100 10k 1m 03718-b-041 10m v s = 15v 200 v/div figure 41. band-pass response pll synthesizers and loop filters phase-lock loop filters are used in am/fm modulation. loop filters in pll design require accuracy and care in their implementation. the ad8671/ad8672/ad8674 are ideal candidates for such filter design; the low offset voltage and low input bias current minimize the output error. in addition to the excellent dc specifications, the ad8671/ad8672/ad8674 have a unique performance at high frequencies; the high open-loop gain and wide bandwidth allow the user to design a filter with a high closed-loop gain if desirable. to optimize the filter design, it is recommended to use small value resistors to minimize the thermal noise. a simple example is shown in figure 42 . 10k r1 v cc v ee 1nf 03718-b-042 vco c1 charge pump phase detector in d figure 42. pll filter simplified block diagram
ad8671/ad8672/ad8674 rev. d | page 15 of 20 outline dimensions controlling dimensions are in millimeters; inch dimensions (in parentheses) are rounded-off millimeter equivalents for reference only and are not appropriate for use in design. compliant to jedec standards ms-012-a a 012407-a 0.25 (0.0098) 0.17 (0.0067) 1.27 (0.0500) 0.40 (0.0157) 0.50 (0.0196) 0.25 (0.0099) 45 8 0 1.75 (0.0688) 1.35 (0.0532) seating plane 0.25 (0.0098) 0.10 (0.0040) 4 1 85 5.00 (0.1968) 4.80 (0.1890) 4.00 (0.1574) 3.80 (0.1497) 1.27 (0.0500) bsc 6.20 (0.2441) 5.80 (0.2284) 0.51 (0.0201) 0.31 (0.0122) coplanarity 0.10 figure 43. 8-lead standard small outline package [soic_n] narrow body (r-8) dimensions shown in millimeters and (inches) compliant to jedec standards mo-187-aa 100709-b 6 0 0.80 0.55 0.40 4 8 1 5 0.65 bsc 0.40 0.25 1.10 max 3.20 3.00 2.80 coplanarity 0.10 0.23 0.09 3.20 3.00 2.80 5.15 4.90 4.65 pin 1 identifier 15 max 0.95 0.85 0.75 0.15 0.05 figure 44. 8-lead mini small outline package [msop] (rm-8) dimensions shown in millimeters
ad8671/ad8672/ad8674 rev. d | page 16 of 20 controlling dimensions are in millimeters; inch dimensions (in parentheses) are rounded-off millimeter equivalents for reference only and are not appropriate for use in design. compliant to jedec standards ms-012-ab 060606-a 14 8 7 1 6.20 (0.2441) 5.80 (0.2283) 4.00 (0.1575) 3.80 (0.1496) 8.75 (0.3445) 8.55 (0.3366) 1.27 (0.0500) bsc seating plane 0.25 (0.0098) 0.10 (0.0039) 0.51 (0.0201) 0.31 (0.0122) 1.75 (0.0689) 1.35 (0.0531) 0.50 (0.0197) 0.25 (0.0098) 1.27 (0.0500) 0.40 (0.0157) 0.25 (0.0098) 0.17 (0.0067) coplanarity 0.10 8 0 45 figure 45. 14-lead standard small outline package [soic_n] narrow body (r-14) dimensions shown in millimeters and (inches) compliant to jedec standards mo-153-ab-1 061908-a 8 0 4.50 4.40 4.30 14 8 7 1 6.40 bsc pin 1 5.10 5.00 4.90 0.65 bsc 0.15 0.05 0.30 0.19 1.20 max 1.05 1.00 0.80 0.20 0.09 0.75 0.60 0.45 coplanarity 0.10 seating plane figure 46. 14-lead thin shrink small outline package [tssop] (ru-14) dimensions shown in millimeters
ad8671/ad8672/ad8674 rev. d | page 17 of 20 ordering guide model 1 temperature range package description package option branding ad8671ar C40c to +125c 8-lead soic_n r-8 ad8671ar-reel C40c to +125 c 8-lead soic_n r-8 ad8671ar-reel7 C40c to +125 c 8-lead soic_n r-8 ad8671arz C40c to +125c 8-lead soic_n r-8 AD8671ARZ-REEL C40c to +125 c 8-lead soic_n r-8 AD8671ARZ-REEL7 C40c to + 125c 8-lead soic_n r-8 ad8671armz C40c to +125c 8-lead msop rm-8 a0v ad8671armz-reel C40c to +125c 8-lead msop rm-8 a0v ad8672ar C40c to +125c 8-lead soic_n r-8 ad8672ar-reel C40c to +125 c 8-lead soic_n r-8 ad8672ar-reel7 C40c to +125 c 8-lead soic_n r-8 ad8672arz C40c to +125c 8-lead soic_n r-8 ad8672arz-reel C40c to +125 c 8-lead soic_n r-8 ad8672arz-reel7 C40c to + 125c 8-lead soic_n r-8 ad8672armz C40c to +125c 8-lead msop rm-8 a0w ad8672armz-reel C40c to +125c 8-lead msop rm-8 a0w ad8674ar C40c to +85c 14-lead soic_n r-14 ad8674arz C40c to +85c 14-lead soic_n r-14 ad8674arz-reel C40c to +85 c 14-lead soic_n r-14 ad8674arz-reel7 C40c to + 85c 14-lead soic_n r-14 ad8674aru C40c to +85c 14-lead tssop ru-14 ad8674aruz C40c to +85c 14-lead tssop ru-14 ad8674aruz-reel C40c to +85c 14-lead tssop ru-14 1 z = rohs compliant part.
ad8671/ad8672/ad8674 rev. d | page 18 of 20 notes
ad8671/ad8672/ad8674 rev. d | page 19 of 20 notes
ad8671/ad8672/ad8674 rev. d | page 20 of 20 notes ?2004C2009 analog devices, inc. all rights reserved. trademarks and registered trademarks are the prop erty of their respective owners. d03718C0C12/09(d)

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